晶圆背面清洁工艺

Abstract –With each new advanced technology node, minimum feature sizes continue to shrink. As a result, the devices become denser and exposure tool depth of focus decreases – making lithography one of the most crucial modules in the process flow. Hence, the elimination of hot spots caused by backside defects is a critical issue that needs to be addressed to prevent significant yield degradation.

As advanced technology nodes progress and become more complex in terms of new film materials / new chemistries / new integration schemes used, the number of required process/measurement steps increase dramatically in order to enable new functionality (e.g. FiNFET) and to meet the ever stringent performance requirements. Detection of wafer front side surface defects has traditionally been of primary concern to semiconductor device manufacturers, while little attention has been paid to defects located on the backside. The backside wafer quality is becoming a challenging issue as the lithography DOF and overlay tolerance margin reduce with the required shrink in device geometry at 1x nodes and beyond [1,2]. In advanced technology nodes such as 7nm, semiconductor device manufacturers have become increasingly aware that defects located on the backside can have a significant impact on yield, rework rates, and scrap, as illustrated in Fig. 1.

An optical picture of typical wafer backside is shown in Fig. 2. Defects on the backside of a wafer can result from many sources and can mainly be classified as particles, residues and scratches. Particles and scratches on the backsides of wafers, often in form of concentric rings, can be induced by wafer handling components such as chucks and robotic arms, as well as by CMP processes. Residues can be left behind on wafer backside due to incomplete removal of un-wanted films or ineffective use of cleaning chemistries. In addition, crosscontamination of wafers and handling equipment can occur when wafers move from tool to tool, through the production line. Backside defects can contribute to photolithography issues by distorting wafer flatness during exposure and causing photolithography hot spots. If the hot spots are detected prior to etch, wafers can be reworked; otherwise, the wafers must be scrapped or will have significant yield loss.