For the manufacturing of submicron or deep submicron ULSIs, it is important to completely suppress particles and contamination created on the silicon wafer surface. The tradition concept for cleaning need was used chemical content (APM, ammonia and hydrogen peroxide mixtures) to play a major role. Unfortunately, the SC-1 (APM) had negative effect on surface damage. In recent years, it has been modified to incorporate a more dilute solution in order to reduce surface micro-roughness caused by ammonium hydroxide. In this paper, a new thinking was proposed to use DI water quick dump rinse (QDR) mode change from conversation set-up to an improvement mode. A modified recipe with modified using DIW can totally remove the particle during process.
As semiconductor device feature size continues to shrink. There is a need to understand the particle removal mechanisms and recognize the advantages and their limitations. In this paper, some particle removal models are modified to be able to remove soft particle deformation. A modified RCA wafer cleaning with / without mega-sonic energy enhancement and various rinsing techniques are investigated for use in deep sub-micron semiconductor device manufacturing. The need for wet-cleaning, proposing a particle-free substrate for use in semiconductor process has become increasingly more important. As semiconductor devices are scale down, the sensitivity of silicon and silicon dioxide substrates to contamination increases. Especially, in manufacturing processes of sub-micrometer and deep submicron ULSI’s, surface microstructure and surface cleanliness of substrates are going to increase their significance as crucial for device performance and reliability. This paper also presents a comprehensive study using surface analysis and inspection techniques to test particle removal rate under various cleaning recipe including (1) Mega-sonic-on and (2) quick dump rinse (QDR) model modified. A higher level quality of clean process was proposed to show DI water is a good median for particle removing. Besides, a more high effectiveness’ monitor action was also studied by detailed design.
As semiconductor devices are scale down, ultra clean surface becomes even more important. In device fabrication, conventional RCA cleaning process and slightly changed one have been continuously used for past three decade [1-3]. The need for clean, particle-free substrate for use in semiconductor processing has become increasingly important. As device dimensions are reduced, the sensitivity of silicon and silicon dioxide substrates to contamination increases. Minimizing electrical effects caused by cleaning are extremely important in controlling contamination. Clean and surface and precise patterns are necessary for high yields and increased process efficiency reproducibility. Minimizing defect density (contaminant/ area) yield loss is a key mission of semiconductor fabricators. An understanding of particle adhesion is imperative to efficiently removing particles in surface cleaning process. There are several types of forces acting to hold particulate contamination on a wafer, which are including: (1) Van der Waals force, (2) electro-double layer force, and (3) deformation induced forces. As the later dimension device is scale down, the vertical dimension is also direct reduction. So, when the techniques roll up, chemical (including CAROS, APM, HPM, and HF) dip time are required to reduce for silicon damage prevents. If ultra cleaning surface is necessary, but chemical dip time is under limited. The option is to select mechanical method for particles removal successful.
An 8 inch Si (100) P-type Epi wafer was used as substrate for particle removal efficiency experiments. For intentional particle contamination, the bare silicon wafers were prepared by covered with thick oxidized wafer (>1000 A) and dipped in HF solution. The detailed process of C/W with fall-on particle is as Figure-1. The wafers were then intentionally contaminated by dipping in as below procedure.
The prepared control wafers are with particles about 200 ea as Fig.-2. The fallen on particles were with water flow-like type distribution map on silicon surface. The control wafers with fallen on particles were preparing for the study of particle removal efficiency (PRE). This method for control wafers with fallen on particles was first time proposed using a sample and low cost procedure. We had proved that the fallen-on particles have same characteristics as other methods.
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