晶圆键合制造技术回顾

Abstract

Techniques for fabricating strained Si, SiGe, and Ge on-insulator include SIMOX, Ge condensation and waferbonding. In this paper, a brief introduction of each method is presented, with a detailed discusion of wafer bondingipproaches for strained Si, SiGe, and Ge on-insulator, Wafer bonding with stop layers is found to be the most generaapproach with the ability to create ultra-thin layers of strained Si, SiGe, and Ge on-insulator with low threadingdislocation densities and precise control over layer thickness.

1. Introduction

The silicon semiconductor industry is currentlyundergoing a revolution. As transistor scaling continuesto encounter both economical and engineering road-blocks, novel materials improvements will continue tobe incorporated into “conventional’ Si CMOS, allowingfor increased performance and lower power consumption.

Strained Si is one such improvement that has recentlycaught the attention of industry and will soon beincorporated into future technology nodes, allowing forenhanced carrier mobilities and in turn increased drivecurrents (l,2]. In addition, multi-channel structures withcompressively strained SiGe layers and tensilely strainedSi exhibit symmetric mobility enhancements for bothelectrons and holes, and have the potential to generatelarge improvements in hole mobilities.

On an independent front, SOl incorporation intoCMOS for high-end performance applications has already occurred. The use of a buried oxide underneathbulk Si CMOS devices produces a number of benefits.including reduction of junction capacitances, increasedcircuit density due to tighter isolation, and reducedlatch-up.

With the acceptance of both strained Si and SOl, anatural desire to merge these technologies arisesStrained Si is typically formed by depositing a gradedSiGe buffer on a Si wafer; incrementally increasing theGe content in the buffer allows for a minimization ofthreading dislocations via the re-use of existing threadsto relieve strain. The final result is a “yirtual substrateformed by the graded buffer of relaxed SiGe on a Sisubstrate, with an arbitrary Ge fraction and consequently a larger lattice constant at the surface. A thintensilely strained Si layer can then be deposited on thesurface of this platform. On the other hand, SOl wafersare typically formed by techniques such as SIMOX(separation-by-implanted-oxygen) and wafer bondingwhere starting substrates in these techniques are usuallyconventional bulk Si. Myriad challenges are encoun-tered when such techniques are adapted to SiGe virtual substrates, making the fabrication of SiGe and strainedSi on-insulator a non-trivial matter.

In this paper, various approaches that have beenemployedfor relaxedSiGe-on-insulator(SGoD.strained Si-on-insulator(SSOD,and Ge-on-insulator(GOl) fabrication will be reviewed. Such approacheshave included SIMOX of SiGe virtual substrates, Gecondensation approaches, and wafer bonding of virtualsubstrates. An in-depth presentation of wafer bondingwith stop layers shows the general nature of this methodwhich allows for the fabrication of high quality strainedSi, SiGe, and Ge on-insulator.

2.SIMOX

Separation-by-implanted-oxygen has long been anestablished method for forming silicon-on-insulatorstructures. The process begins with implantation ofoxygen ions into the substrate, after which ex situannealing at elevated temperatures removes implantdamage and forms a buried silicon dioxide layer.Application of SIMOX to SiGe virtual substrates leadsto acceptable buried oxide formation for low Ge con-centrations, including 10% and 18% Ge [9,10]. Unfortunately, when applied to higher-Ge content SiGe, theprocess does not generate good quality structures for Geconcentrations greater than 30%, due to a number oflimiting factors, including surface oxidation of SiGeduring post-implant annealing, and thermal instabilityof SiGe at elevated temperatures [ll]. Due to theseproblems,SIMOX for SGOI fabrication has notachieved a prominent role, and other techniques havebeen pursued and developed.