Organic thin-film transistors are field-effect transistors comprising a semiconductor in the form of a thin, typically polycrystalline layer of conjugated organic molecules. Since organic transistors can often be fabricated at temperatures no higher than about 100 °C, they are potentially useful for flexible, large-area electronics applications. An important performance parameter of organic transistors is the transit frequency, which is the highest frequency at which the transistors can be operated. The transit frequency of organic transistors is determined in large part by the channel length and the parasitic gate-to-source and gate-to-drain overlap lengths. How small these dimensions can be made depends (at least in the case of transistors fabricated in the lateral device architecture) greatly on the resolution of the lithography method that is utilized for the patterning of the gate electrodes and the source and drain contacts. Patterning methods that have yielded organic transistors with lateral dimensions sufficiently small to provide transit frequencies above 10 MHz include photolithography, laser lithography, stencil lithography, and electron-beam lithography. In this review, these four lithography methods and their roles in the fabrication of high-frequency organic transistors, as well as their prospects for future improvements in the dynamic performance of organic transistors, will be illuminated.
1. Introduction
Field-effect transistors (FETs) are three-terminal microelectronic devices in which the density of mobile electronic charges in a semiconductor and thus the electric current flowing through the transistor can be modulated by a transverse electric field applied by means of a metallic gate electrode across a thin insulating layer (the gate dielectric). FETs are used to implement a variety of electronic functions, such as switching (digital circuits), amplification (analog circuits), transduction (sensors) and data storage (memory). The semiconductor most commonly employed in FETs is single-crystalline silicon, based on which approximately 1022 FETs are manufactured annually for microprocessors, graphics processors, memory, wireless communication and many other types of integrated circuits. The maximum process temperature during the fabrication of silicon FETs is close to 1000 °C, required for the post-implantation anneal. Since the gate dielectric of silicon FETs is an oxide (traditionally silicon dioxide produced by the thermal oxidation of silicon; more recently also atomic-layerdeposited hafnium oxide), these FETs are called metal-oxide-semiconductor FETs, or MOSFETs. The most advanced silicon MOSFETs have a physical gate length (not to be confused with the numerical “node” identifier) of about 10 nm and a physical gate-dielectric thickness of about 2 nm (or slightly below that).
To enable the fabrication of FETs on substrates other than silicon, a wide range of alternative semiconductors that can be deposited in the form of thin solid films onto arbitrary substrates by chemical vapor deposition (CVD), physical vapor deposition (PVD) or atomic layer deposition (ALD) have been developed. These semiconductors include hydrogenated amorphous silicon (a-Si:H),polycrystalline silicon and amorphous or polycrystalline metal oxides, most notably zinc oxide and indium gallium zinc oxide (IGZO). Such FETs are called thin-film transistors (TFTs). The main application of TFTs is in electronic systems that require transistors to be fabricated on mechanically flexible or optically transparent substrates and/or to be distributed over large areas (e.g., larger than a silicon wafer). Examples for TFT applications are active-matrix displays and active-matrix sensor or detector arrays.These are usually fabricated on glass or polyimide substrates by the sequential deposition and patterning of all the functional materials. The maximum process temperature for the fabrication of high-performance TFTs based on inorganic semiconductors ranges from about 150 °C for metal-oxide TFTs to about 250 °C for amorphous-silicon TFTs to about 425 °C for low-temperature polycrystalline-silicon (LTPS) TFTs.
In lateral transistors, the channel length and the gate-tocontact overlaps are defined by the lateral distance between the edges of the source and drain contacts (L) and by the lateral overlap of the gate electrode with respect to the source and drain contacts (Lov; see Figure 1b). Therefore, both the channel length and the gate-to-contact overlaps of lateral transistors are defined by the lithographic patterning of the gate electrodes and the source and drain contacts. The lithographic techniques that have been employed in the fabrication of high-frequency lateral organic TFTs will be the focus of this review.
Figure 1. a) Contour plot showing the transit frequency (fT) calculated using Equation (1) and plotted as a function of the channel length (L) and the gate-to-contact overlap (Lov) for the following parameter values: μ0 = 10 cm2 V−1s−1, RCW = 10 Ωcm, VGS − Vth = 5 V, Cdiel = 0.1 μF cm−2. As can be seen, the transit frequency has a strong dependence on the channel length (L) and the gate-to-contact overlaps (Lov). b) Schematic cross-section of an organic transistor in the lateral, inverted coplanar (bottom-gate, bottom-contact) device architecture.
One of the key advantages and the main reason for the unparalleled success of photolithography in global semiconductor manufacturing is its potentially very high throughput, which is owed to the fact that the entire substrate (or at least an entire chip, as in the case of projection lithography) is exposed at once and within a very short amount of time, usually no more than a few seconds. Photolithography can provide high throughput regardless of whether it is performed with or without masks. Maskless photolithography avoids the often substantial costs for the fabrication of photomasks and is thus useful for rapid prototyping (and for mask fabrication), while mask-based photolithography is often the preferred choice for high-volume manufacturing.
Another useful feature of photolithography is that it lends itself naturally to the self-alignment of the source and drain contacts with respect to the gate electrode by means of a backside exposure during which the gate electrode serves as a photomask for the patterning of the source and drain contacts.Provided the substrate is sufficiently transparent and the gate material is sufficiently opaque for radiation at the exposure wavelength, this method provides a cost-effective and high-throughput approach to the quasi-elimination of the gate-to-source and gateto-drain overlaps. Organic TFTs with gate-to-source and gate-todrain overlaps as small as 25 nm and transit frequencies as high as 3.3 MHz have been reported by the groups of Barbara Stadlober (Joanneum Research) and Alasdair Campbell (Imperial College London). Figure 4 illustrates some of the results of the fabrication of organic TFTs with vanishingly small gate-to-contact overlaps achieved with the help of self-aligned photolithography.
Figure 4. Self-aligned photolithography for organic TFTs with extremely small gate-to-contacts overlaps, accomplished using a backside exposure during which the gate electrode serves as a photomask for the patterning of the source and drain contacts (Ursula Palfinger et al.). Adapted with permission.[37] Copyright 2010, Wiley-VCH.
2、Patterning of Organic Semiconductors
The previous sections focused on the patterning of the gate electrodes and the source/drain contacts, since the resolution with which these are patterned is directly relevant to the channel length and the gate-to-contact overlaps and thus to the dynamic performance of the TFTs. Nevertheless, the organicsemiconductor layer must usually be patterned as well, in order to minimize leakage currents and to allow TFTs based on different organic semiconductors (e.g., p-channel and n-channel organic TFTs) to be placed in dense patterns, that is, in close proximity to each other. The requirements in terms of the resolution are generally less critical in this case, so that techniques other than the ones discussed in the previous sections may be considered. However, organic semiconductors tend to be more sensitive to process chemicals than the metals typically employed for the gate electrodes and the source/drain contacts, and this may limit the choice of the patterning approaches. One option are additive processes by which the organic semiconductors are deposited onto the substrate only where needed, for example by inkjet printing,organic vapor-jet printing or vacuum deposition through stencil masks. Subtractive patterning of organic semiconductors has been demonstrated as well, for example by using a combination of orthogonal photolithography and oxygen-plasma etching, by exploiting the gate electrodes (of top-gate TFTs) as an etch mask,or by laser ablation.
As a final note, it is worth pointing out again that in the commercial manufacturing of silicon MOSFETs, which represent the most successful type of semiconductor device to date, the by far most critical process steps are those in which the transistor components are lithographically patterned. It is important to understand that for organic TFTs to eventually find use in high-volume commercial applications, a similar emphasis on high-resolution lithography may be critical. This is what we hope to accomplish with this review.
