前端清洗工艺中的硅化物残留

时间:2023-02-02 13:44:51 浏览量:0

Abstract— Salicide Residue is a common and well-known defect in CMOS technology of semiconductor wafer fabrication industries. This defect usually resides that is observed after Salicide Pre-Clean step whereby the product wafers after cleaning with standard diluted Hydrofluoric Acid (dHF). This defect can cause induced leakage current, directly impacting the electrical performance of the electronic product. Like many other wafer fabs, initiatives and efforts had been taken but never yield a very significant improvement. As of today, this type of defect is still persisting and remaining as one of the most challenging and unsolved phenomenon in wafer fabrication industry. This paper will explore next step towards eliminating the issues. Series of experiments were conducted to deduce the source to the root cause. Types of machines were screened through to dictate if the different machine hardware in general has significant contribution to the development of residue. Then the process tanks in the machine were tested to narrow the source of caused. The results of the experiments indicate a positive correlation between the DHF tank with the carbon residue after pre-salicidation clean which has lead the research to next step to solve the issue.


I. INTRODUCTION

The advancement in the semiconductor wafer fabrication industry has been rapidly advancing. Semiconductor wafer fabrication also known as “fab” in short [1][2], is the most complex manufacturing process compared with other industries. The fabrication of semiconductor wafer requires the most advanced technologies in order to strive for the best among worldwide competitors. Wafers used in electronic integrated circuit (IC) fabrication usually in the size of round silicon disc consist of diameters ranging from 6”, 8” up to 12”[1]. The thickness of a single wafer disc is around 700um upon completed fabrication process before sending for wafer sawing process[3].


Wafer fabrication is used to build components with the necessary electrical structures. The fabrication is a procedure composed of many repeated sequential processes to produce complete electrical or photonic circuits. Commonly the overall wafer fabrication process is sub-divided into at least six distinct modules namely Implant, Photolithography, Thin Film, Diffusion, CMP and Wet Clean. A typical wafer needs over 200 repeated process steps from the total steps up to 1000 steps[4][5]. Averagely cycle time for a common product takes up 60 to 90 days.


The fabrication of wafer usually begins with the design of the circuit and defining its specific functions. The layout of the signals, inputs, outputs and voltages needed are then being identified. These electrical circuit specifications usually will facilitate by the IC Drawing software to create the designs routes, soon to be printed onto the wafers during the fabrication process [3]. The resolution of the circuit increases rapidly with each step in design, as the scale of the circuits at the start of the design process is already being measured in fractions of micrometers. Each step thus increases circuit density for a given area.


The new processes to accomplish each wafer fabrication with better resolution improved every year, in tandem with constantly changing technology in the wafer fabrication industry. New technologies result in denser packing of minuscule surface features. This increased density continues the trend often cited as Moore's Law [1][6][7][8].


To stay competitive in today’s wafer fabs business, companies must make efforts to ensure many aspects to meet with stringent specifications. Aside from the shortest product cycle time, good quality and lasting durability, good product yield also plays an important factor in judging the profitability of a semiconductor wafer fabs[9] . Yield refers to an amount produced as a result of the effort or energy invested. Percentage Yield is the ratio of output compared to input, and the Fab Yield is the number of wafers completed divided by the number of wafers at the beginning of the process [10].


II. RESIDUE DEFECTS

Wet cleaning plays an important part to ensure surface cleanliness for advanced semiconductor manufacturing process. As the technology node advances, it has become more and more challenging. Presence of organic residues and cluster of particles on product wafers can cause lot of issues. These clusters of particles and organic residues are found to be die killers and hence, reduce the yield of the product [11]. Residue defects affect the circuitry by causing a short between two neighboring metal structures. As the trend of maximizing the number of dies produced by a wafer, the physical size of a semiconductor die must reduce so that more dies can be accommodated on a single silicon wafer. Due to the significant deduction in size, this may cause two neighboring points become closer. Hence, any residue could have the potential to cause a short between two metal points thus affects the circuitry operation [12]. Salicide residue is a carbon defect which is observed after Salicide pre-cleaning step. The defect location is consistently seen at 7-8 o’clock region (with wafer notch at 12 o’clock during process) as shown in figure 1 below.

图片

Fig 1. Carbon residue found on the wafer surface
In general, in the wafer fabrication process, the silicon semiconductor wafers shall be processed through Blanket Low Temperature Oxide (LTO) deposition and annealing. This process usually taken place at the thin film dielectric module by means of chemical vapor deposition (CVD). Next, dry etching process will etch the LTO at unmasked area until a given thickness accordingly to the specific process specification. The unmasked surface area must be thoroughly cleaned in order to provide good salicidation process to take effect in the next stream of process. To achieve this, pre-metal cleaning process step is inserted into the chain of process to ensure the silicon wafer surface is cleaned thoroughly. After cleaned, the hydrophobic silicon surface tends to attract residues from wafer edge and the wafer backside. Carbon residue is then consistently found on the wafer surface [13].


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