反应离子蚀刻的实用方法

时间:2023-03-30 09:39:04 浏览量:0

1. Introduction

Plasma etching, dry etching and reactive ion etching (RIE) all describe processing techniques that have in common the fourth state of matter: plasma, also called the ionized state of material. The plasma state describes a condition where one or more gases are held at a certain pressure and submitted to an electrical potential, causing the partial ionization of the gas atoms [1]. In plasma, positive ions, radicals and electrons co-exist. About three decades ago, most industrial processes for semiconductor devices relied heavily on wet etching techniques; however, plasma processes, and more specififically RIE, gradually replaced wet etching techniques. This was due to their superior uniformity, repeatability and, more importantly, high throughput with the advent of equipment allowing batch processing.


For instance, increasing ICP power would lead to higher plasma density and simultaneously to lower dc bias. Therefore, ICP reactors are capable of achieving anisotropic etching at a much higher rate than CCP reactors. The process can be tuned to minimize the dc bias responsible for inducing damage to the etched sample surface. The dc bias in an ICP reactor can easily be tuned to be about 20–30% of the dc bias in a CCP reactor. As a result, it is widely accepted that average damage in ICP or similar high-density plasma reactors is much smaller than induced damage in CCP reactors.


2. General aspects of RIE

2.1. Anisotropy in dry etching

One aspect worthy of explanation is the interpretation of anisotropy in dry etching. In wet etching, anisotropic/isotropic etching indicates the etching process results in different shapes along different crystal orientations. Hence, isotropy means the same shape is obtained along all crystal orientations. The obvious example here is etching GaAs (0 0 1) in H3PO4 : H2O2 : H2O mixture, resulting in a V-grooved shape along the [0 1 1] direction and a dove-tailed shape along the ¯ [0 1 1] direction. Note that the V-planes (along [0 1 1]) and ¯ the dove-tail planes (along [0 1 1]) are identical. Both are (1 1 1)A facets distinguished as being terminated with a Ga atom or other III-elements atom which is bonded to three As (or other V-elements atom) located in the underlying layer. This leaves the Ga atom with no available electrons to establish any bonds and results in a higher chemical inertness of A facets in III–V semiconductors. As wet etching is the slowest at the (1 1 1)A facet and the fastest at (1 1 1)B which is Asterminated. However, in dry etching anisotropy/isotropy is not related to crystal orientation but to the resulting shape: 100% anisotropy means vertical etched sidewalls whereas 100% isotropy means spherical sidewalls as a result of equal vertical and horizontal etching, as demonstrated in fifigure 1. As discussed later, anisotropic etching is obtained when suffificient sidewall passivation takes place during the etching process.


2.2. Loading effect 

This effect associated with RIE processes describes how the etching depth and rate may vary with the total surface area exposed to etching [2, 3]. This can be elucidated by the faster depletion of reactants with larger surface areas to be etched as compared to when only a small piece of the same material is exposed to an RIE process. However, this effect is very dependent on the chemistry used (i.e. the gases), the chamber confifiguration and, more importantly, the material forming the lower electrode. When the material of the lower electrode can be etched with the chemistry used, the loading effect on the real samples to be etched is minimized. This is due to the simple fact that the reactants will react with both the samples to be etched and with the electrode material. This larger, combined, exposed surface contributes to the elimination of the loading effect. This is demonstrated with practically identical etching rates when etching Si using either a graphite or a Si electrode, and the etching rate of Si sample edges doubling when using a Styron electrode [3]. The loading effect should be considered when etching InP-based materials in CH4 : H2 plasma discharges with a lower electrode made of quartz. Quartz is practically insensitive to CH4 : H2 discharges, resulting in the reactants migrating along the electrode surface until they make contact with the InP material. In these conditions, etching a 1 × 1 cm2 InP sample would result in a much higher etching depth compared to the situation where a full 2 inch InP wafer is etched. Also, and as reported in [3], the etching rate at the edges of the sample would be higher than in the middle. In such cases, the way to circumvent this problem is to use, at all times, a sacrifificial sample of the same material (e.g. a 2 inch InP wafer), onto which the effective small piece can be positioned. In this way the etching rate is determined by the total surface area which is now formed by the 2 inch wafer. Even using different sample sizes results in the total surface area exposed to the plasma process remaining practically constant, resulting in fairly constant and reproducible etching rates. A similar effect can occur when etching samples of equal size but differing in the size of the exposed area: a 2×2 cm2 sample with a 10% opened area (through a mask) will etch much faster than the same size sample (2×2 cm2) presenting an opened area of 90%. As stated earlier, the loading effect strongly depends on the chemistry, chamber confifiguration and the lower electrode material. Experiments reported in [2, 3] deal with a parallel plate reactor. In most ICP reactors, a Si carrier wafer is used, onto which small size samples are positioned or fifixed. Depending on the chemistry used, the loading effect tends to be much reduced, especially when the Si carrier wafer is etched at the same time. This is particularly true in flfluorine-based chemistry where etching rates of SiNx or SiOx samples are independent of sample size if placed on a Si carrier wafer, as the carrier wafer is also etched in this chemistry. The loading effect is also reduced in an ICP reactor using Cl2-based chemistry, as the Si carrier wafer is also etched by chlorine radicals.


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Fig1

Knowing that the difference between the two samples is due to the temperature evolvement, we can conclude that the whiskers were formed due to the excessive heating of the as-placed sample, whereas the thermally coupled sample with a temperature very close to that of the electrode (60 ◦C) was devoid of whiskers. This excessive heating likely resulted in the polymerization of the CH4 into larger molecules, causing the micro-masking and generating the whiskers. However, it is not clear why only the s.i. InP is subjected to this excessive heating whereas conductive InP substrates have shown a smooth etched surface. It is worth noting that etching s.i. InP for the much longer time of up to 7 min did not result in longer whiskers.

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